Generally, vertical MOS devices are constructed with gate and source external contacts on the front, or top, major surface of a semiconductor substrate and an external drain contact on the opposite (bottom or back) major surface. This structure is a natural result of the fact that the drain is formed first and can be contacted from the opposed major surface without additional manufacturing steps. However, having external contacts on both sides of the substrate severely limits the mounting and applications of the structure.
To overcome this problem, the prior art diffuses a heavily doped conductive buried layer in the substrate. An epitaxial layer is grown over the buried layer and a plurality of deep wells are diffused into the epitaxial layer so as to be in contact with the buried layer. Vertical MOS devices are then formed in the epitaxial layer so that the drains are in contact with the buried layer. External drain contacts are formed on the surface of the epitaxial layer in contact with the deep wells. Thus, all of the electrodes of the MOS devices are on the same side of the substrate and the mounting problems are eliminated.
One of the major problems that occurs in the prior art buried layer structure is that the buried layer, which is heavily doped to make it conductive, diffuses into the epitaxial layer during subsequent processing. To stop this diffusion from interfering with proper MOS device functions, the epitaxial layer must be formed thick enough so that the effects of up diffusion can be accounted for. This often requires an epitaxial layer thickness of more than 10 microns. Because of the thickness of the epitaxial layer, the diffused deep wells contacting the buried layer must be much deeper which, therefore, results in the width of the deep wells being very large. The width of the deep wells is larger than 30 microns which requires a substantial amount of substrate surface and greatly reduces the number of devices that can be formed in the substrate.